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Electro-Thermally Induced Parasitic Gate Leakage Test |
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Electro-Thermally Induced Parasitic Gate Leakage (GL) is a trapped-charge phenomenon affecting plastic encapsulated integrated circuits in varying degrees depending upon circuit design, fabrication technology, molding compound, and post mold cure profile. The phenomena occurs at high temperature when an electric field (E-field) is present. GL results in yield losses during high temperature processes, especially those with heated air flow (e.g., high temperature handling and IR re flow solder operations). The phenomena can be detected as an increase in ICC, input leakage, pin parametric's degradation, or functional failure.
The following Industry Standards are used to test device for (GL) test.
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