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Submit RFQ For ESD
 
Customer Name*
Contact (email)* Phone*
Fax No. P.O No.(Please Attach Fax)
 
Pkg. Type
Part No.
No. Of Units To Test
 
Required Test and Standards (Please specify those which apply)
 
HBM JEDEC JESD 22-A114E
HBM MIL STD 883 ; 3015.7
HBM ESDA STM 5.1
HBM AEC Q100-002
MM JEDEC Std. JESD22-A115-A
MM ESDA STM 5.2
MM AEC Q100-003
CDM JEDEC Std. JESD22-C101-C
CDM ESDA STM 5.3.1
Custom Test (Please Specify)  

Note:  STS strongly recommends using the JEDEC Std. for testing. It is a more current specification than the Mil Std. and is the standard the industry is moving towards.

Human Body Model Yes No Machine Model Testing Yes No

 
PLEASE PROVIDE A PINLIST OR DIAGRAM FOR THE DEVICE
Number of No Connect pins

Please list the Power pins or pin-groups to be tied separately, including ground groups.   Also,  indicate the number of pins in each group. (Use end of Request to list additional Pin-groups)

       
Power Group # of pins per group Power Group # of pins per group
PWR 1 PWR 4
PWR 2 PWR 5
PWR 3 PWR 6
 

Note:  Multiple Vdd(Power) bus dramatically increases the test time and the number of times each pin will be zapped. It also increases the cost and cycle time. We normally connect all Vdd (Power) pins that are on the same plane (type/value) on one bus, unless specified otherwise. It is also recommended that analog and digital power pins be separated even though they are fed from the same supply.

 
Single Zap Voltage level stress per device
Multiple Zap Voltage level stress per device

Note: Multiple Zapping can result in cumulative damage to the device.  STS, therefore, recommends that devices be zapped at a single voltage for qualification purposes.

 
For Single Zap Voltage level stress, specify the voltage level(s) / the number of devices per level. # of Devices
 
For Multiple Zap Voltage level stress, please specify:
Start voltage: End voltage: and Step Increment:
Are both polarities required?   Yes No

Note:   Our System has the capability to specify which polarity to Zap first. Please indicate by Yes or No if you have preference.

 
Is curve tracing of the pins required to determine pass / fail? Yes No

Note: If curve tracing is required it should only be used as an indication that the pin I/V characteristics have changed. Curve tracing should NEVER be used in defining pass/fail criteria for qualification of a device. Both Mil Std. and JEDEC specify that only electrical test be used to determine whether the device has passed ESD testing or not.

 
If Curve Trace is required, please specify:
Sweeping Voltage from   (V) (V)
Current Limit (mA) 
What is the fail criteria?   %
Note: STS normally uses  >10% change in the I/V characteristics as the Fail Criteria.

 
Charged Device Model Testing : Yes No
         
PLEASE PROVIDE A PINLIST OR DIAGRAM FOR THE DEVICE
PLEASE PROVIDE PACKAGE/DEVICE DIMENSIONS*
 
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